The Universal Selection Source: Adhesives Ingredients


Methods And Apparatuses For High Temperature Bonding Controlled Processing And Bonded Substrates Formed Therefrom

Application Date:
Mar 21, 2013
USPTO Patent:
US 13325587

The present invention discloses a bonding method for a three-dimensional integrated circuit and the three-dimensional integrated circuit thereof. The bonding method comprises the steps of: providing a substrate; dep...

KUAN-NENG CHEN, Hsinchu City (TW)
Sheng-Yao Hsu, Taichung City (TW)
International Classification:
H01L 23/48 (20130321); H01L 21/60 (20130321)
US Classification:
257/777; 438/107; 257/E2301; 257/E21506


What is claimed is:

1. A bonding method for a three-dimensional integrated circuit, applicable for manufacturing the three-dimensional integrated circuit, and the bonding method comprising the steps of: providing a first integrated circuit and a second integrated circuit each sequentially having a substrate, a film layer and a metal co-deposition layer, and each of the...



This application claims the benefit under 35 U.S.C. §119 of Taiwan Patent Application No. 100133482, filed Sep. 16, 2011, which is hereby incorporated by reference in its entirety.

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